Computer architecture and the fetch execute cycle | Past Papers | O Level | URDU | By ZAK

Chapter 3:
Hardware
3.1 Computer architecture
2 (a) Understand the purpose of the components in a CPU, in a computer that has a Von Neumann architecture
• Including:
- units: arithmetic logic unit (ALU) and control unit (CU)
- registers: program counter (PC), memory address register (MAR), memory data register (MDR), current instruction register (CIR) and accumulator (ACC)
- buses: address bus, data bus and control bus
(b) Describe the process of the fetch-decode-execute cycle including the role of each component in the process
• How instructions and data are fetched from random access memory (RAM) into the CPU,
how they are processed using each component and how they are then executed
• Storing data and addresses into specific registers
• Using buses to transmit data, addresses and signals
• Using units to fetch, decode and execute data and instructions