DVD - Lecture 6c: Floorplanning

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  • Опубліковано 29 гру 2024

КОМЕНТАРІ • 5

  • @rogerfederer6456
    @rogerfederer6456 Місяць тому

    Hello Professor Teman, what is the reason behind placing the power-hungry macros away from the chip center for wire bond in the slide on Hard Macro Placement. What role does position have in the therma aspect? Whats the relation to the wire bond? Does it matter if it is a BGA?

    • @AdiTeman
      @AdiTeman  23 дні тому

      Hi, sorry for my belated answer.
      The main reason would just be to get them as close as possible to the source of the power supply (i.e., power pad), so the IR Drop would have minimal effect.

  • @rogerfederer6456
    @rogerfederer6456 Місяць тому

    What might be the use of a routing blockage?

    • @AdiTeman
      @AdiTeman  23 дні тому

      Thanks for the question. This is indeed a good one.
      There are several reasons for blocking routing, but to give you a few examples:
      1) Leaving a "feedthrough" channel for a signal to be routed from the toplevel. Say there is an analog input that needs to be fed from a pad to a block that is blocked by this macro, then we can leave a channel to route the signal when the toplevel routing is applied.
      2) Special circuits (usually analog) that don't want to have noisy digital signals running on top of them.
      3) A hierarchical macro is only provided a certain number of metals to use (the rest being allocated to the top level). In this case, you would set an attribute for top level routing, but you could also apply a blockage to be sure the tool didn't do anything funny (which these tools are known to do).
      I'm sure there are many more examples, but these just came off the top of my head.

    • @rogerfederer6456
      @rogerfederer6456 23 дні тому

      @@AdiTeman thanks for the clarification