Enabling the PCIe 7.0 and PCIe 6.x ecosystem at PCI-SIG DevCon 2024 | Synopsys

See a variety of PCIe 7.0 and PCIe 6.x interop demos with our partners, including the world's first PCIe 7.0 over a DAC cable, other backplane channels interops performing at 128 GT/s, JTOL testing and our PCIe 6.x reference design including PHY + Controller
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