Let me say at the beginning I find your video's to be educational and informative in electronic design in this series. As we both know that using values as near as possible will have very little effect on the outcome of the circuit parameters from a design point of view. There are many rules of thumb that designers use as short cuts. Again a great series.
Thank you very much! 😀 True that. The point of design and analysis is to get us "in the ballpark" so that we can make intelligent modifications to the first prototype to meet requirements. 🙂
Not sure if this video was in response to a comment I made about multi stage amp design if so you nailed it Ralph thanks so much for all the hard work putting this together. So Ralph how are going to top this one? 😮 Looking forward to the next video and where this series will ultimately end up.
Well ... yes, you were one of the commenters that asked for a multi-stage example. I'm glad that it is everything you were hoping for. The immediate plans ... Next video is 3 ways to measure output impedance (as promised) and then load lines (which will include a bit of a tutorial on curve tracer stuff). My plan at that point is to switch gears for one video to cover some stuff on the nanoVNA at the request of another subscriber. Then it is back to a video on difference amplifiers. This kind of blows the top off of the standard model we've been using. The end goal? The Gilbert Cell balanced mixer/modulator/demodulator/voltage controlled amplifier...etc. all in one circuit thingy. 🙂 I am truthfully very excited about all of this.
I created one in simulation running from 0.1Hz100 MHz. The limitation on the low end is due to the capacitors. Their Xc of Ce1 is increasing, Re1b is becoming more and more of a factor in the gain as frequency decreases. The Xc of the input capacitor is also increasing, creating a voltage divider with the input impedance of the circuit (which is increasing with decreasing frequency). I think the upper end is a limitation because of the transistor, itself. Here is a link to the pdf of the results: drive.google.com/file/d/1UAVKSLmhESPPQzrTwxwdp2iJa4ewtju2/view?usp=sharing
What would happen if we stuck a coupling capacitor between the Common Emitter output and the Common Collector input ? Wouldn't that isolate the DC of the two halves and make them essentially two simpler to calculate ? N.B. You would have to add another bias resister for the Common Collector stage of course.
Good question! Yes, you could do this, but it would add a frequency response aspect to the design that doesn't exist with direct coupled design. The frequency response would drop off more sharply at the low end; the low end will also suffer because of the bypass capacitor in the emitter. The smaller the capacitor value, the sooner the gain will begin to drop as we go down in frequency. One other aspect is that, from an A.C. perspective, the loading effects of the second common-collector stage cannot be ignored. So, you have to deal with it anyway, just not in the D.C. design. So, you are right, but there is a price to pay, so to speak. One of the reasons I did a direct coupled design for this video was to demonstrate how to deal with the effect of circuit loading🙂
I contend that the resistor ( R22) is not necessary. Since the 1st stage is beta stabilized the collector voltage (Q2) very stable, therefor the voltage (Re2 is stable.
Ya know ... you got me thinking. So, I set up a simulation in LTSpice to test this theory. "How much of a difference does it make from the perspective of a simulated design?" I asked myself. I thought I'd share the results. I stepped the DC current gain of both transistors from 100 to 300. I also stepped the value of R22 from the designed 51.793K to 1000Meg. I looked at the D.C. output (with v(in) = 0). The one with R22 as designed varied by 0.573 Volts D.C. as the DC current gain changed. The one with R22 essentially nonexistent (1000Meg) varied by 0.600 Volts. So, yes, R22 does make a positive difference, but not very much of one! A mere 27 mV! 🙂 Thanks for getting the mental juices flowing!
Well...I do have a number of videos on using test equipment. Scopes, VNAs, Spectrum Analyzers, Antenna Analyzers and the like. Here is the link to the first one on using an oscilloscope (the tour, what is what): ua-cam.com/video/1Sq4L2x4lfU/v-deo.html and the second one (making measurements): ua-cam.com/video/G5-IJkoW2lE/v-deo.html Hope this helps. 🙂
@@rtybn2012??? I just went to another browser (not signed in as me...or anyone), went to my channel, clicked on the "Videos" tab as opposed to the "Home" tab. I scrolled down and counted 162 videos. So, this has me puzzled. 😕 I think the home tab has a subset of the whole.
I'm puzzled . . . in LTspice yes you indeed get approx. 5v output for a 50mV input. But if you add an isolating capacitor to the emitter of Q2 and a 10 Ohm resistor down to ground (imitating a 10 Ohm speaker) then the output falls to mV and is distorted. Is this a practical design or does it need an additional push pull output stage?
Well ... it isn't designed to drive a low impedance like a 10 Ohm speaker. Remember, the input impedance of the stage to follow or the load impedance appears in parallel with the collector resistor of the driving stage to create the actual collector resistor value in the design. This could be an inter-stage amplifier inside a larger amplifier or other such application where it is driving a high impedance load. So, yes, you *would* need some sort of push-pull speaker driver stage if you want to drive a 10 Ohm speaker. This video is an example of how to do the design of this sort of amplifier. It is up to the designer to apply this process to their particular application.🙂
Thank you . .I've got that. I see my 10 Ohm resistor seriously reduced the effective AC resistance of the previous collector resistor so that the gain was reduced to almost nothing. I will now try for my own satisfaction to add a push pull output as an exercise.
Thank you so much! 🙂 I was very fortunate because the professor who taught this course at Syracuse University when I was there was really good and walked through things this same way. One of the differences is that we often would populate matrices and perform linear algebra to solve for circuit values using the mainframe computer and the APL programming language. I have **LONG** since forgot how to do it that way. 🙂
Wow, as if by magic!!!
A video appears...I just remarked that I was ready to watch
another episode of
EIE
I am so glad that you are finding these helpful. I'm having fun with this series, too! 🙂
Let me say at the beginning I find your video's to be educational and informative in electronic design in this series. As we both know that using values as near as possible will have very little effect on the outcome of the circuit parameters from a design point of view.
There are many rules of thumb that designers use as short cuts. Again a great series.
Thank you very much! 😀
True that. The point of design and analysis is to get us "in the ballpark" so that we can make intelligent modifications to the first prototype to meet requirements. 🙂
What an organized, well put together lesson! Very nice job putting this all together. Thanks and take care.
Thank you so much. Yes, it was a LOT of work, but so much fun! 🙂
now I remember why I hated these calculations. Yes this is the right and only way to be shure it works all the way. Thanks.
Yes, it can most certainly be tedious! It is a real puzzle and stretches the brain matter.
You are very welcome. 🙂
Great lesson. Thanks!
Thanks so much ... and you are very welcome! 🙂
👍Thank you sir.
You are very welcome! 🙂
thank you for making this video
You are very welcome! 🙂
Not sure if this video was in response to a comment I made about multi stage amp design if so you nailed it Ralph thanks so much for all the hard work putting this together.
So Ralph how are going to top this one? 😮
Looking forward to the next video and where this series will ultimately end up.
Well ... yes, you were one of the commenters that asked for a multi-stage example. I'm glad that it is everything you were hoping for.
The immediate plans ... Next video is 3 ways to measure output impedance (as promised) and then load lines (which will include a bit of a tutorial on curve tracer stuff).
My plan at that point is to switch gears for one video to cover some stuff on the nanoVNA at the request of another subscriber.
Then it is back to a video on difference amplifiers. This kind of blows the top off of the standard model we've been using. The end goal? The Gilbert Cell balanced mixer/modulator/demodulator/voltage controlled amplifier...etc. all in one circuit thingy. 🙂
I am truthfully very excited about all of this.
Are you able to show a bode plot of your circuit's performance?
I created one in simulation running from 0.1Hz100 MHz. The limitation on the low end is due to the capacitors. Their Xc of Ce1 is increasing, Re1b is becoming more and more of a factor in the gain as frequency decreases. The Xc of the input capacitor is also increasing, creating a voltage divider with the input impedance of the circuit (which is increasing with decreasing frequency). I think the upper end is a limitation because of the transistor, itself.
Here is a link to the pdf of the results:
drive.google.com/file/d/1UAVKSLmhESPPQzrTwxwdp2iJa4ewtju2/view?usp=sharing
What would happen if we stuck a coupling capacitor between the Common Emitter output and the Common Collector input ? Wouldn't that isolate the DC of the two halves and make them essentially two simpler to calculate ? N.B. You would have to add another bias resister for the Common Collector stage of course.
Good question! Yes, you could do this, but it would add a frequency response aspect to the design that doesn't exist with direct coupled design. The frequency response would drop off more sharply at the low end; the low end will also suffer because of the bypass capacitor in the emitter. The smaller the capacitor value, the sooner the gain will begin to drop as we go down in frequency.
One other aspect is that, from an A.C. perspective, the loading effects of the second common-collector stage cannot be ignored. So, you have to deal with it anyway, just not in the D.C. design.
So, you are right, but there is a price to pay, so to speak.
One of the reasons I did a direct coupled design for this video was to demonstrate how to deal with the effect of circuit loading🙂
@@eie_for_you Basically, "There's no such thing as a free lunch"
@@paulperano9236True that!
I contend that the resistor ( R22) is not necessary. Since the 1st stage is beta stabilized the collector voltage (Q2) very stable, therefor the voltage (Re2 is stable.
Ya know ... you got me thinking. So, I set up a simulation in LTSpice to test this theory.
"How much of a difference does it make from the perspective of a simulated design?" I asked myself. I thought I'd share the results.
I stepped the DC current gain of both transistors from 100 to 300. I also stepped the value of R22 from the designed 51.793K to 1000Meg. I looked at the D.C. output (with v(in) = 0). The one with R22 as designed varied by 0.573 Volts D.C. as the DC current gain changed. The one with R22 essentially nonexistent (1000Meg) varied by 0.600 Volts.
So, yes, R22 does make a positive difference, but not very much of one! A mere 27 mV! 🙂
Thanks for getting the mental juices flowing!
Any thoughts about a video using test equipment, audio and RF signal generators and of course an oscilloscopes?
Well...I do have a number of videos on using test equipment. Scopes, VNAs, Spectrum Analyzers, Antenna Analyzers and the like.
Here is the link to the first one on using an oscilloscope (the tour, what is what): ua-cam.com/video/1Sq4L2x4lfU/v-deo.html
and the second one (making measurements): ua-cam.com/video/G5-IJkoW2lE/v-deo.html
Hope this helps. 🙂
You list a total of 162 video's but there are only 70 that are accessible.
@@rtybn2012??? I just went to another browser (not signed in as me...or anyone), went to my channel, clicked on the "Videos" tab as opposed to the "Home" tab. I scrolled down and counted 162 videos.
So, this has me puzzled. 😕 I think the home tab has a subset of the whole.
I'm puzzled . . . in LTspice yes you indeed get approx. 5v output for a 50mV input. But if you add an isolating capacitor to the emitter of Q2 and a 10 Ohm resistor down to ground (imitating a 10 Ohm speaker) then the output falls to mV and is distorted. Is this a practical design or does it need an additional push pull output stage?
Well ... it isn't designed to drive a low impedance like a 10 Ohm speaker. Remember, the input impedance of the stage to follow or the load impedance appears in parallel with the collector resistor of the driving stage to create the actual collector resistor value in the design.
This could be an inter-stage amplifier inside a larger amplifier or other such application where it is driving a high impedance load. So, yes, you *would* need some sort of push-pull speaker driver stage if you want to drive a 10 Ohm speaker.
This video is an example of how to do the design of this sort of amplifier. It is up to the designer to apply this process to their particular application.🙂
Thank you . .I've got that. I see my 10 Ohm resistor seriously reduced the effective AC resistance of the previous collector resistor so that the gain was reduced to almost nothing. I will now try for my own satisfaction to add a push pull output as an exercise.
@@Old_Coder Perfect! Have fun! 🙂
I really wish that electronics was taught like this in college.
Thank you so much! 🙂
I was very fortunate because the professor who taught this course at Syracuse University when I was there was really good and walked through things this same way. One of the differences is that we often would populate matrices and perform linear algebra to solve for circuit values using the mainframe computer and the APL programming language. I have **LONG** since forgot how to do it that way. 🙂