Відео

thanks for producing this and sharing it with us! i'd love to hear about more unusual parts of the design

But why 💀

can i know what is the simulator used in video??

I feel like youve missed an important part of the design you'll see with Ben Eater and similar. All registers and anything else that might output data onto the bus or read from the bus uses ics that are clock controlled. So if you something like a 74hc377 buffer for your register, you dont care what those control line are doing during the setup time since there is no clock pulse. Also if youre using the AT28C256 or similar eeprom, your setup time is down to 70ns. So if your breadboard computer clock is less than 10MHZ, you dont have to worry about it.

Nice. Adding vga to mine.

? and when the E2PROM does a page write? I don't quite get why using one here anyway.

When your circuits get big enough and/or fast enough, there's a good chance you switch everything over to synchronous design and just reclock just about everything after it's decoded. In FPGAs, there's a FF sitting after each LUT, so you might as well use it. For particularly wide input functions, breaking up the decode into several stages, and then pipelining around it to account for the delay may be the only way to get the circuit to run at speed reliably.

This was a lot of good work you put in, with the Arduino, it is more flexible than having fixed control logic or a microcode ROM (EEPROM) to have to program via Arduino.

I used Super Tech Brake Cleaner from walmart when I would need to prepare titanium parts for anodizing. The stuff to be really careful with it hitting is plastic, polycarb, plexiglass, paint, and stuff like that. It's good to know it doesn't touch touch the solder mask. It will melt plastic, though. It also will kill insects if you spray them with it, so I would use that on centipedes and wasps and shit since I already had it lying around and it worked really well.

What did you call those wires? I have not heard that term before. Thank you!

This is great. Thank you!

It would be far more impressive to use a CPU from less than 5 years ago...

Why not use an ultrasonic cleaner?

Design rule: Asynchronous signals like output enables or set/reset signals must always be registered ("qualified"?) by a flip-flop if there is any change of spurious transitions.

And now I know _why_ an EPROM doesn't necessarily work as an instruction/address decoder. Thanks.

Sample the outputs of the EEPROM, all of them

Thanks for sharing. Hope ya'll are safe during the hurricane.

I recognize you are using KiCad for your board design, but I'm curious about what you are using for your logic simulator?

Wow, great stuff. I'm still extremely new to super low level stuff and electronics in general, and my first instinct when you posed the problem was to just disable the decoder using the opposite clock (eg: load the eeprom address and disable the decoder output on clock high, then enable the decoder output on clock low). Actually splitting the clock into multiple phases though seems way more flexible, not only allowing prefetch like you mentioned, but in theory allowing for other combinations of more granular execution timing. Super elegant solution that I doubt I would have ever come up with.

Nice,thanks :)

Think you might be interested in some vintage math chips? I have five AM25LS2517 ALUs and three Fairchild 93S43 4-bit multipliers. The AM25LS2517 is a bit interesting as it is similar to the 74LS381 but two of its outputs are different.

Okay, so this is why it's really hard to design a working CPU if you aren't already experienced at designing digital logic in general. If you are, you already know that you have to be very disciplined about timing, & timing diagrams are your friend, so none of this stuff will come as a surprise to you. (Citation: I was designing high speed embedded control systems back in the late 80s.)

That's so well designed😊

Thank you

Bad design!!! You can add a register at the output of the eeprom... Your design should be synchronous ONLY!!!

This issue pops up in a few places. I've just discovered that during bootup, a lot of the output pins on the ESP32S3 have undefined output states for something like 60ųS, which is definitely enough time to trip up direct hardware. For devices connected via I2C, not a problem; they'll see a garbage packet and ignore it. But direct logic will respond as if those are valid outputs O_O

I totally agree. The control logic is by far the most difficult part of designing a microprocessor. You could latch the output of the eeprom in conjunction with a capacitor, but there's no way around its high latency. A state machine driven by a counter or timer performs faster, but adds a lot of complexity, however, it can be simplified with a careful optimization of the control path.

The same issue arises when using FPGAs to replace discrete logic. The logic can be designed so that unexpected changes are suppressed by the order in which things are gated, but FPGAs are usually using a logic LUT which will need some form of clocking once the result has settled.

3:01 that's why you use an output buffer / latch ... are ok that's where you where going

And the ultrasound head is user as a joystick.

Well, OF COURSE :P

In theory you could use a grey-code sequence for the EPROM address inputs, that way only one line changes at a time. I keep meaning to try it out sometime. Thanks for the video.

Awesome video. I worked at a defence contractor that had legacy designs using 8 and 16-bit processors like this. By the time I started working there, they had moved on to implementing these systems in FPGAs. Once I understood timing closure and setup/hold times, I took for granted that the compiler tools did all of that thinking for me. After watching this video, I am super grateful that a lot of the analysis is automated. I cannot fathom the amount of time and rework that would be needed to analyze every signal's timing characteristics by hand.

I have little experience but I thought that with a synchronous circuit the norm was the central clock connects directly to the clock pin of every register. The register then has either an enable and maybe a direction control, but they are just levels that must be setup properly with respect to clock. Or a D or JK flip flop for flags. Now I did work with an asynchronous computer, the PDP-10 KA10 CPU, where all registers are made of set/reset flip flops. In that case, to load a value one must find a short pulse to clear the register, then a later pulse ANDed with the data to be loaded to set the flip flop. The AND function would be built into the module's set inputs since every use case requires it (no ICs in this CPU except for some 8 bit RAM chips to implement 16 36 bit CPU registers, those 72 bytes were a $9000 option, $81,000 in today's dollars, ). Since there is no clock, the machine is driven by pulses that flows through all the delay lines and conditional pulse directors, and if it ever gets lost, the machine ceases. Fun to design but rather parts hungry. If the designer follows the rules, it simply works, except for everything else waiting to bite his butt.

simply use alcohol or flux remover

There's always a lot of interesting things to learn at the boundary between theory and practice. Very nicely done!

But what if the output latch takes a long time to settle?

"Im Engineerin' my freaking limit, partner!"

Also, I know I keep saying 'demultiplexer' when I mean to say decoder. Sorry about that.

Nice summary of the issues with asynchronous signalling in a system. Perfect length & depth and no annoying extra fluff. I wish all content creators was as succinct as you. But there's still a chance of a latch/FF not actually having the same propagation delay between CP to Qn for all outputs. The datasheets doesn't usually mention any delta or variation figures between the outputs, but I'm sure there are some, and they will also be affected by the capacitive load on the particular output. Granted, the possible glitches (which should be just overlaps and not real glitches unless you have combinatorial logic using multiple outputs from the latch - like a decoder ^__^ ) will be *much* shorter than the outputs taken directly from the ROM. They're probably so short that they won't be interpreted as a valid signal for an Enable / Clr /Latch on the destination ICs anyways.

Isopropyl alcohol 99,x % and even the spezialiced electronics and PCB cleaner is not that much more expensive than good quality brake cleaner...

Nice review

I do this all the time in a ventilated place, always forget to buy contact cleaner but can't live without brake cleaner. The only real problem is any sticker/glue or paint, just like your led graphs, the components themselves survive beautifully.

Next time, get the green can. Non-chlorinated. Safer on parts that have plastic.

i only use brake cleaner for cleaing PCBs or removing thermalpaste

I use Berryman B-12 chemtool carb cleaner for flux cleaner it works really good its made to remove varnish from carburators it does not damaged the boards and components i usually work on but it can damage plastic case parts i usually test a small spot first to make sure its safe it is blend of acetone toluene & butoxyethanol

try paint stripper next time like nitromors

❤️ Great video, funny was thinking of it but never tried !

why?