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Hello, Can you assist me to add a PIO I need to add DHT11 and store data to Onchip memory

jingle bells

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Thank you! Altera has great FPGAs, but they are so incredibly bad at doing hands-on tutorials.

im balling

Damn, your keyboard must HATE you....

thank you for very informative material could you please explain how to extend this to multiple nios processor (multiprocessor)

Hey! I have a cyclone v soc development kit by altera, so is this version of linux compatible with my board too? Note that my board has the same fpga and arm as this one

Gracias.

THANK YOU BRO, YOU HELPED ME A LOOOOOOOOOOOT. I CANT EXPRESS HOW HAPPY I AM THAT THIS THING WORKED

You're the best :)

I followed along using a Terasic DE1 / Cyclone II and Quartus II 13.0sp1 ... and I couldn't believe that it worked the first time. (even though there a minor differences). Now how to program the LED's, 7-segment digits, and read switches. ... then how to pass data back and forth. AND then find a tutorial that shows how to do this same kind of thing using a hard-processor, like a DE0-Nano-Soc, DE1-SoC, and/or DE10-Nano (as I have all three of those!)

Hello, your videos have been beneficial. My classmate and I are struggling to write an interrupt using JTAG UART. Would you happen to have any pointers/guides for us? Thank you kindly!

Does this work for de2-115 board as well?

Thank Sir! The lecture is very easy to understand.

Hi! In my case, i see no change on reg variables... All remains x

oh man it was very helpful, I could not figure out with the official helps from Intel. They just need to support your channel and make them educational videos.

I hought Questa is a new kind of simulation 🙂 Kind of native like Vivado has. Looks like it is the old modelsim with some easy way to control the simulation instead of using TCL. Not exactly what I expected, but this is ok. Thanks for the video

This stuff is amazing, very clear. Many thanks.

Amazing channel

Thank you. Helped get me going on a school project.

Was your Quartus Prime STANDARD edition or PRO edition? I think NIOS V is not supported in LITE edition, is this true?

I am having trouble with the NIOS V licensing. I am using Quartus Standard 90-day evaluation. What could be a solution to it?

respected sir what you are saying everything iam doing but in output file folder .sof file is not generated please help me why the .sof file is not generated please give me suggestion for that

This video is very useful to start.

Again an excellent, practical run-through, again very useful. Thank you for your excellent videos.

Very useful, practical run through. Thank you! I am going to subscribe and take a look at your other videos...

never seen Quartus without warnings 😂

Is there a guide or manual for the commands you used in the TCL and wave.do files?

Using Quartus Prime Lite 18.1 and FreeRTOSv202212.01 - Compile error: "FreeRTOS/include/FreeRTOS.h:59:28: fatal error: FreeRTOSConfig.h: No such file or directory" The problem is that FreeRTOS.h cannot see FreeRTOSConfig.h The solution is to either move FreeRTOSConfig.h into the FreeRTOS/include folder or change the include statement in FreeRTOS.h to "../../FreeRTOSConfig.h"

Epic

Hi, thank you for the video, very informative! I'm on an older copy of quartus (14.1, licensed with a bunch of stuff) and I am trying to get FreeRTOS running on my Nios setup. I seem to be having a fight with the system timer. In my case, it seems that the altera init code sets up and launches the timer before calling main(), and I think this is causing FreeRTOS to fail to configure the timer. In your case, you didn't seem to have to stop the altera code, your task timer "just worked".. Any ideas? In my case with FreeRTOS, the timer sets the IRQ high and never clears it again. I'm digging in to see if the FreeRTOS timer setup code is failing..

Is it possible to run without external memory(sdram)? I want to running with only on-chip memory include Nios II. And I want to use the FreeRTOS.(latest version)

Is it possible to run without external memory(sdram)? I want to running with only on-chip memory include Nios II or Nios V.

Is it possible to run a project through Nios V Command shell only? I made the hello world app with the command you showed at 14:00 : "niosv-app ..." and want to complete the tutorial without using Ashling

Вот чем занимается Санта Клаус летом)

hey tscevers, first of all, thank you for your video. I would like to ask you a question. How can I check the signal in specific parts? For example, I would like to check it in sample 16, sample 32 and sample 108 for example at the same time. Depending on the value of it, I would make an action. Just to explain the context: I'm trying to create a decoder for a IR remote control using the FPGA. When I click I receive a signal like this one on your video, but I would like to capture the value in some parts, like sample[16], sample[32], sample[108], is it possible? Or there is a easier way to get these specific values? Thank you in advance!

Thanks for the great channel. Highly appreciated. Would you please do a video about how to use an external memory for the Nios processor program memory.

Hello sir, many thanks for your intuitive video, could you please also provide a tutorial about how to use 'write master' block in Nios II so that the external FPGA module can write data into it, and Nios II Core can read it? Thank you again!

I am using a Chinois board, I v seen you use the System and SDRAM Clocks for DE-series boards for the clocks, could I use the same thing even if my board is not DE10?

For DE1-SoC users, please move all the .h files into the BSP folder. Otherwise, the .h files will not be included in the project

Thanks for the great tutorial. It's very detail and easy to understand. I have been looking for tutorials like this for a long time. I am truly grateful for the efforts you made to make this video. Please keep making videos like this especially for FPGAs and Nios II. By the way, where did you learn how to do all these?

Hi there. Thanks for a very detailed and easy to understand video tutorial. I used to be a Arduino user and recently just got very interested in FPGAs. I bought a Terasic DE10-Lite and started configuring the FPGA. Anyway, I have a question. I am a newbie so my question might sound very dumb. When you programmed the HPS, are you programming the ARM processor on the board, or the FPGA?

Hi sir. I hope we can go deep into the rust part.

For anyone using FreeRTOSv202210.01-LTS (or presumably newer versions), leave the ALT_ENHANCED_INTERRUPT_API_PRESENT definition in system.h as it is, i.e. don't change it to ALT_LEGACY_INTERRUPT_API_PRESENT. The default configuration works just fine now, whereas the legacy configuration gives you a compile error.

I'm curious that you're able to download the software to the Nios2 system without having included a System-ID peripheral and/or having checked the "Ignore mismatched system-ID / ignore mismatched timestamp" check boxes on the "Run Configuration -> Target Connection" screen. If I don't do those things, download never works for me (Quartus Lite 21.1.1 running on Ubuntu 20.04, programming a DE2-115 Cyclone IV board).

Thank you! this is very helpful.

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Thanks 😁

For anyone who experiences the "undefined reference to 'restore_sp_from_pxCurrentTCB' in port.c" error, the solution is to open the Makefile for the project, find the line that says "ASM_SRCS := " and add FreeRTOS/portable/GCC/NiosII/port_asm.S to the line. For some reason its not already there. This should result in a successful build after following along here