Inderjit Singh Dhanjal
Inderjit Singh Dhanjal
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Відео

AEC Lec 2 | 17.7.2024 | Clipper Circuit | LTspice Simulation
Переглядів 1794 місяці тому
AEC Lec 2 | 17.7.2024 | Clipper Circuit | LTspice Simulation
EEEE IA1 Training Session | LTspice Training | DC Circuit Simulation | 17.03.2024
Переглядів 1,5 тис.8 місяців тому
EEEE IA1 Training Session | LTspice Training | DC Circuit Simulation | 17.03.2024
EEEE online problem solving session 3
Переглядів 2389 місяців тому
EEEE online problem-solving session 3 covers the following contents: Numerical on the following topics are not limited to a) Resistive simplification b) Star-Delta and Delta-Star transformation c) Mesh and Super Mesh analysis d) Nodal and Super Node analysis e) Thevenin's theorem / Norton's theorem f) Maximum power transfer theorem g) Superposition theorem
EEEE online problem solving session 2
Переглядів 1139 місяців тому
EEEE online problem-solving session 2 covers the following contents: Numerical on the following topics are not limited to a) Resistive simplification b) Star-Delta and Delta-Star transformation c) Mesh and Super Mesh analysis d) Nodal and Super Node analysis e) Thevenin's theorem / Norton's theorem f) Maximum power transfer theorem g) Superposition theorem
EEEE online problem solving session 1
Переглядів 2179 місяців тому
EEEE online problem-solving session 1 covers the following contents: Numerical on the following topics are not limited to a) Resistive simplification b) Star-Delta and Delta-Star transformation c) Mesh and Super Mesh analysis d) Nodal and Super Node analysis e) Thevenin's theorem / Norton's theorem f) Maximum power transfer theorem g) Superposition theorem
Energy band diagram of MOS Capacitor under Accumulation and Depletion mode with p-type Si substrate
Переглядів 1,5 тис.11 місяців тому
BVLSI design lecture 4 covers the following topics: 1. Energy band diagram of MOS Capacitor under Accumulation mode with p-type Si substrate 2. Energy band diagram of MOS Capacitor under Depletion mode with p-type Si substrate
EEEE Lecture 10 Live 2023 | Superposition Theorem | Numerical's | LTspice Simulation
Переглядів 169Рік тому
Elements of Electrical and Electronics Engineering (EEEE) lecture 10 covers the following contents: 1. Solved one Numerical based on Maximum Power transfer theorem (solution) 2. Superposition theorem (explanation steps) 3. Solved two numerical based on the Superposition theorem ( solution LTspice simulation)
EEEE Lecture 9 Live 2023 | Maximum Power Transfer Theorem | Numerical's | LTspice Simulation
Переглядів 124Рік тому
Elements of Electrical and Electronics Engineering (EEEE) lecture 9 covers the following contents: 1. Maximum Power transfer theorem (explanation steps) 2. Proof for Max Power Transfer theorem 3. Condition for Max Power Transfer theorem 4. Solved one Numerical based on Maximum Power transfer theorem (solution LTspice simulation)
EEEE Lecture 8 Live 2023 | Norton's theorem | Numerical's | LTspice Simulation
Переглядів 170Рік тому
Elements of Electrical and Electronics Engineering (EEEE) lecture 8 covers the following contents: 1. Solved one Numerical based on Thevenin's theorem (solution LTspice simulation) 2. Norton's theorem explanation 3. Technique to find In (Norton's equivalent current and Rn (Norton's equivalent resistance) 4. Solved two Numerical based on Norton's theorem (solution LTspice simulation)
EEEE Lecture 7b Live 2023 | Thevenin's theorem | Numerical's | LTspice Simulation
Переглядів 132Рік тому
Elements of Electrical and Electronics Engineering (EEEE) lecture 7b covers the following contents: 1. Thevenin's theorem explanation 2. Technique to find Vth and Rth 2. Solved two Numerical based on Thevenin's theorem (solution LTspice simulation)
EEEE Lecture 7a Live 2023 | Source Transformation | Numerical's | LTspice Simulation
Переглядів 148Рік тому
Elements of Electrical and Electronics Engineering (EEEE) lecture 7a covers the following contents: 1. Concept of Source transformation 2. Solved two Numerical on Source transformation (solution LTspice simulation)
EEEE Lecture 6 Live 2023 | Mesh Analysis | Super Mesh Concept | Numerical's | Ltspice Simulation
Переглядів 140Рік тому
Elements of Electrical and Electronics Engineering (EEEE) lecture 6 covers the following contents: 1. Mesh Analysis using KVL (concepts steps) 2. Concept of Super-Mesh 3. Solved four Numerical on Mesh analysis (solution LTspice simulation)
EEEE Lecture 5 Live 2023 | Nodal Analysis | Supernode concept | Numerical's | LTspice simulation
Переглядів 200Рік тому
Elements of Electrical and Electronics Engineering (EEEE) lecture 5 covers the following contents: 1. Nodal Analysis using KCL (concepts steps) 2. Concept of Supernode 3. Solved four Numerical on Nodal analysis (solution LTspice simulation)
EEEE Lecture 4 Live 2023 | Kirchhoff's Current Law (KCL) | Kirchhoff's voltage Law (KVL)
Переглядів 191Рік тому
Elements of Electrical and Electronics Engineering (EEEE) lecture 4 covers the following contents: 1. Kirchhoff's Law concept 2. Basic definition of Circuit, Node, Loop, branch, ground, or reference node with examples 3. Kirchhoff's Current Law (KCL) ( Concept with examples) 4. Nodal analysis using KCL ( Concept steps to solve) 5. Kirchhoff's voltage Law (KVL) ( Concept with examples) 6. Sign c...
EEEE Lecture 3 Live 2023 | Delta to Star and Star to Delta transformation | LTspice simulation
Переглядів 206Рік тому
EEEE Lecture 3 Live 2023 | Delta to Star and Star to Delta transformation | LTspice simulation
EEEE Lecture 2 Live 2023 | Resistive series circuit | VDR | CDR | Resistive parallel circuit
Переглядів 303Рік тому
EEEE Lecture 2 Live 2023 | Resistive series circuit | VDR | CDR | Resistive parallel circuit
EEEE Lecture 1 Live 2023 | Voltage | Current Definitions | Ohms Law | Resistance concept | Sources
Переглядів 449Рік тому
EEEE Lecture 1 Live 2023 | Voltage | Current Definitions | Ohms Law | Resistance concept | Sources
Half wave controlled rectifier with RL load and freewheeling diode (PE Lec 7)
Переглядів 458Рік тому
Half wave controlled rectifier with RL load and freewheeling diode (PE Lec 7)
Half wave controlled Rectifier analysis with RL load (PE Lec 6)
Переглядів 549Рік тому
Half wave controlled Rectifier analysis with RL load (PE Lec 6)
Numerical on Half wave controlled rectifier Part B (PE Lec 5)
Переглядів 369Рік тому
Numerical on Half wave controlled rectifier Part B (PE Lec 5)
Numerical on Half wave controlled rectifier Part A (PE Lec 4)
Переглядів 567Рік тому
Numerical on Half wave controlled rectifier Part A (PE Lec 4)
Half wave controlled Rectifier analysis using SCR (PE Lec 3)
Переглядів 548Рік тому
Half wave controlled Rectifier analysis using SCR (PE Lec 3)
Power Diode and SCR (PE Lec 2)
Переглядів 254Рік тому
Power Diode and SCR (PE Lec 2)
Simulation of AC Voltage Control circuit using DIAC-TRIAC in LTspice
Переглядів 8 тис.2 роки тому
Simulation of AC Voltage Control circuit using DIAC-TRIAC in LTspice
Single Phase Full Bridge Inverter with RL load simulation using eSim open-source EDA tool
Переглядів 1,3 тис.2 роки тому
Single Phase Full Bridge Inverter with RL load simulation using eSim open-source EDA tool
Boost converter (Step-up Chopper) Simulation using eSim open-source EDA tool
Переглядів 6272 роки тому
Boost converter (Step-up Chopper) Simulation using eSim open-source EDA tool
Buck converter (Step-down Chopper) Simulation using eSim open-source EDA tool
Переглядів 8062 роки тому
Buck converter (Step-down Chopper) Simulation using eSim open-source EDA tool
Half wave controlled rectifier using RL load simulation in LTspice
Переглядів 2,3 тис.2 роки тому
Half wave controlled rectifier using RL load simulation in LTspice
Half wave controlled rectifier using R load simulation in LTspice
Переглядів 4,1 тис.2 роки тому
Half wave controlled rectifier using R load simulation in LTspice

КОМЕНТАРІ

  • @khangleba7311
    @khangleba7311 8 годин тому

    In Q2, how about if VS > 1V. When, VGS < Vth ==> Cut-off?

  • @khangleba7311
    @khangleba7311 22 години тому

    Thank you, Sir. But I have a question. At 18:29, it seems like ID does not follow KCL according to your diagram.

  • @DhruvGupta-f3n
    @DhruvGupta-f3n 2 дні тому

    nice lecture, thank you sir.

  • @ec-052ruhulla5
    @ec-052ruhulla5 2 дні тому

    sir thank you,you are straight to the point

  • @Deepak-ip1se
    @Deepak-ip1se 4 дні тому

    very well explained!!

  • @NitianRohitKumar
    @NitianRohitKumar 5 днів тому

    may you provide the notes

  • @ernestomunoz212
    @ernestomunoz212 6 днів тому

    Sr. I do really appreciate your content. Always straight forward and providing solid foundations frm the very fundamentals!!!!

  • @modi_hemnt77
    @modi_hemnt77 10 днів тому

    This is very helpful. Thanks.

  • @1C00LTV
    @1C00LTV 14 днів тому

    Are paji jiyo yar, ek numberrr video ❤❤

  • @althaf2527
    @althaf2527 14 днів тому

    Sir in the first qn how the output swing become greater than the supply

  • @shaikmohiddin2990
    @shaikmohiddin2990 21 день тому

    Watching this video before 2hrs of exam 😅

  • @vibhushitmarwaha6766
    @vibhushitmarwaha6766 21 день тому

    can you provide the notes

  • @Sundaryt
    @Sundaryt 22 дні тому

    A really good video man cleared all my doubts

  • @nitheshvh9712
    @nitheshvh9712 25 днів тому

    Sir can you share this notes if possible.

  • @Jenny_208
    @Jenny_208 27 днів тому

    Can you provide PDF please 😢😢

  • @sushmithasanthosh8938
    @sushmithasanthosh8938 28 днів тому

    Sir where are the notes uploaded??

  • @rahulkulk745
    @rahulkulk745 Місяць тому

    thank you sir for these videos, feels sad that no students are responsive, teacher like you deserves huge appreciation

  • @lavyagaur6293
    @lavyagaur6293 Місяць тому

    Please suggest a book for it

  • @maheshnamboodiri4097
    @maheshnamboodiri4097 Місяць тому

    I understood how charge sharing is avoided because of Precharge PMOS being weak-on. However, what is the point of the weak-on NMOS in the middle block? Could we not replicate it with a normal clock-bar connected to that NMOS like in NORA? I didn't understand the contribution of NMOS to the removal of sharing and leakage.

  • @esaineshhvarakotraivel2470
    @esaineshhvarakotraivel2470 Місяць тому

    Which is scaling lecture in your playlist?

  • @Oliver_Huang
    @Oliver_Huang Місяць тому

    Hi sir, is there a part 2 somewhere? thank you

  • @IC_design_Bellamkonda
    @IC_design_Bellamkonda Місяць тому

    Very nice explanation. Keep going.

  • @ahmettevfikcakir2303
    @ahmettevfikcakir2303 Місяць тому

    Thank you for this great video. How can I add filter to this schematic?

  • @rajuVLSIengineer
    @rajuVLSIengineer Місяць тому

    Sir Please upload videos on Module No: -5 (Analog VLSI Design) Analog Layout and other concepts Analog Layout Techniques 🙏

  • @fidelcertuche8002
    @fidelcertuche8002 Місяць тому

    Thanks for this fine explanation!!!

  • @Rajesh-45-ro
    @Rajesh-45-ro Місяць тому

    Please share notes sir🙏🙏

  • @SSW_1354
    @SSW_1354 Місяць тому

    Sir can you please send the notes of all topics

  • @anmolgupta6968
    @anmolgupta6968 Місяць тому

    29:30 Why "Vgd3" needs to be zero for M3 to be in saturation?

  • @harshmagnani4501
    @harshmagnani4501 Місяць тому

    In rout of pmos (load)gm will not come into picture because vin is not there there is bias voltage so for small signal model the vgs for m4 will be 0... So gm will not come.

  • @uzairwajeeh1737
    @uzairwajeeh1737 Місяць тому

    Tried to make this exact circuit but the problem is that the circuit is not amplifying the current, rather it is doing the opposite so iam quite confused

  • @vijaynemane7632
    @vijaynemane7632 Місяць тому

    Best best! Best explanation Ever!!💯💯 👍

  • @ahnafhabib4596
    @ahnafhabib4596 Місяць тому

    sir how can i implement boolean function in np cmos

  • @harshmagnani4501
    @harshmagnani4501 Місяць тому

    Please upload full playlist.. this is module 3.2, where are module 1, 2...?

  • @ranasadhukhan1669
    @ranasadhukhan1669 Місяць тому

    Great work.

  • @elcindotech
    @elcindotech Місяць тому

    I did the same simulation with you, but the results are not the same as the simulation you played. negative waves are not present in the DIAC output, do you want to provide a solution? Thank you

  • @lavyagaur6293
    @lavyagaur6293 2 місяці тому

    Also should it not be that To ensure reliable operation, the clock frequency must be chosen to allow sufficient setup and hold times, which is achievable with modern logic families including advanced TTL and CMOS.

  • @lavyagaur6293
    @lavyagaur6293 2 місяці тому

    sir jk flip flops do not suffer from race condition ;gated/clocked latches do

  • @lakshmibollineni3500
    @lakshmibollineni3500 2 місяці тому

    Sir can u please teach us how to design a 3 to 8 line decoder

  • @harivs4527
    @harivs4527 2 місяці тому

    best lecture ever

  • @everythingever4316
    @everythingever4316 2 місяці тому

    can anybody reply for my query

  • @everythingever4316
    @everythingever4316 2 місяці тому

    Hello everyone i am designing 2 stage opamp by following this video and i am following exactly it but not getting results. when i am performing dc analysis as shown in this video and getting dc parameters then results are not as per the dc parameters shown in this video and in place of Vth value i am getting 0 but in this video it is showing 0.7 volts. so can anybody help me regarding this. i am using nmos 4 symbol in schematic and giving model statements in spice directive as shown in this video. As per my vision i am thinking that model files for nmos 4 is not included in my LT spice XVii which i installed so how to include it or any other reason please tell me.

  • @justromio5140
    @justromio5140 2 місяці тому

    Notes?

  • @ZHITAOLI-x4h
    @ZHITAOLI-x4h 2 місяці тому

    you are the best teacher,these graphes are so clear and understandable. Thanks sir

  • @Walking_Musicplayer
    @Walking_Musicplayer 2 місяці тому

    sir can you provide these notes on your website please🙏

  • @VishwasAR
    @VishwasAR 2 місяці тому

    sir what is the technology that you have used

  • @AdarshKumar-hx8zr
    @AdarshKumar-hx8zr 2 місяці тому

    Sir for learning more about single stage amplifier ...can we study from behzad razavi CMOS book and also for the question?

  • @ece64yugalsaxena48
    @ece64yugalsaxena48 2 місяці тому

    Thank you Sir, it clear all my doubts 🙏

  • @djackson603
    @djackson603 2 місяці тому

    Your path variable must be set to include Java3d and JRE_HOME variable must be set. Here is the bat file that I use to run, #### Echo Off path=".;%path%;c:\Program Files\Java\Java3d\1.5.2\bin" "%JRE_HOME%\java.exe" -Djava.library.path="c:\Program Files\Java\Java3D\1.5.2\bin" -classpath "c:\Electric\Electric-9.07\*;c:\Electric\BeanShell\*;c:\Program Files\Java\Java3d\1.5.2\lib\ext\*;c:\Electric\jython2.7.0\jython.jar" -mx500m com.sun.electric.Launcher echo $path timeout /t 50 ####

  • @theoryandapplication7197
    @theoryandapplication7197 2 місяці тому

    thank you very much sir , the video that i am looking for