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Down to the Wires
Canada
Приєднався 21 сер 2017
How computing hardware works. All the way down to the wires. Assembly language. Flip-flops and gates. ALU, CPU, and all the acronyms. Caches, pipelines, memory hierarchies.
MIPS quick reference sheet: www.dropbox.com/s/jw8nmpguiaw0ufo/MIPS%20sheet%201.6.pdf?dl=0
MIPS datapath design: www.dropbox.com/s/qs4eq88cf4e5w4z/mips%20datapath.pdf?dl=0
MIPS quick reference sheet: www.dropbox.com/s/jw8nmpguiaw0ufo/MIPS%20sheet%201.6.pdf?dl=0
MIPS datapath design: www.dropbox.com/s/qs4eq88cf4e5w4z/mips%20datapath.pdf?dl=0
Classical logic with Quantum gates
The toffoli gate is universal, in that it can perform any classical logic. In this video I show briefly how to implement classical logic functions with only Toffoli gates. We introduce toffoli, show it's classical interpretation, show how to produce AND and NOT classical functions, how to build a simple logical function, and then we show OR. We remind the viewer that any input superposition values that are altered should be restored.
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Відео
Intro to Current Events playlist
Переглядів 153Рік тому
This playlist will be a place for conversations about issues of technology in general, from AI to social media, and the impact of technology on society. I am often asked to provide expert commentary to media organizations, and this is a way to expand the conversation to other audiences.
9 ARM autoindexing
Переглядів 150Рік тому
This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
8 ARM Load Store
Переглядів 155Рік тому
This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
7 ARM Multiply
Переглядів 72Рік тому
This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
6 ARM Shifting
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This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
5 ARM Immediate Encoding Examples
Переглядів 1,1 тис.Рік тому
This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
4 ARM Operand 2 for Data
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This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
3 ARM Data Instructions
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This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
2 ARM Programmer Model
Переглядів 180Рік тому
This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
1 ARMv7 Intro
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This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
FP8 Doing Math with Floating Point Numbers
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This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
FP7 Denormalized, Denormal, or Subnormal Numbers
Переглядів 1,1 тис.Рік тому
This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
FP6 Special numbers
Переглядів 193Рік тому
This video series starts at the very beginning and shows each step in the design of modern computing hardware. From bits to gates to registers to CPU. A followup video series will show how the CPU is expanded with modern techniques like cache, pipelining and multiprocessing.
FP4 Ranges and Exclusions of Floating Point Numbers
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FP4 Ranges and Exclusions of Floating Point Numbers
FP3 An 8-bit Toy Encoding of Floating Point Numbers
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FP3 An 8-bit Toy Encoding of Floating Point Numbers
Faster binary addition: the carry lookahead adder
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Faster binary addition: the carry lookahead adder
Architecture 2: introduction to the next series
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Architecture 2: introduction to the next series
MD4: Signed Multiplication and Booth's Algorithm
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MD4: Signed Multiplication and Booth's Algorithm
Simplification 6: NAND implementation example
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Simplification 6: NAND implementation example
thanks man !
Great lesson, Master! Where can i access these slides?
Your my Uncle
7:17 I didn't get this 😢 someone please explain
TNX a bunch sir, how can we get access to these shits ?
brilliant!
How do we just say the bias is 3, I didn't get that part
Thank you
can you do an example for maxterms and pos
superb!!!
In 2:36 should be just ABD and not ABD'
Watched all of your videos and now im ready for my exam coming up (hopefully). Thank you so much for making such easy and simple explanations.
very good explanation
These state diagrams made me go crazy, until I've watched this tutorial. Thank you so much!!!
thank you for this video! do you still have the reference sheet?
can you expound more on how line 4 was distributed in product of maxterms
THANK YOU! <3
Thank you so much! The whole playlist helped me a ton - never delete them; these videos are the best! God bless!
Thankyou so much
sir you are goated
I learned more with these 4 videos than in the past few weeks. Thanks a lot!
I wish I had a professor like you in my college
very helpful, thank you so much
uh
Another question…a qubit can represent more than one bit, is it due to its spin direction and angle ? For example, a qubit can spin up or down, therefore the spin up can represent 1 and spin down can represent 0, and thus one qubit can represent one bit. In addition to up/down spin, it can also spin at an angle, for example, 90 degrees, 180 degrees or 270 degrees. So, from this degree distinction, a qubit can represent more bits. Thus, more angles more bit representation. My question is, how do you detect and measure the direction and angle of a qubit ?
For example, when you implement an AND gate, there are two physical transistors tied together with two bit inputs and one output. So with qubits, how do you physically AND two qubits and detect the one output ?
Best explaination ever
Sir, you are a great teacher! Thanks so much ❤❤❤❤
This is the best, most concise explanation of this I've ever seen. Thank you.
that was very helpful. thanks
Thank you
thank you very much so easy to understand
Holy wow”, this explanation is so clear! 💫
ABI BEN SENIN DASAGINI YIYEYIM
You look like Ryan Gosling
what's a "literal"
very well explained, thank you
Thank you. Took long enough to find someone who could actually explain this in an easy matter
Thanks!
What is the difference between a bubble and an inverter if they both do the same?
A bubble is just a shorthand notation for logical inversion, either on an input or an output of a gate. its quicker and easier than drawing a complete inverter. The transistor implementation of a NAND gate is smaller and faster than an AND gate and a NOT gate, but for the logic problems it's the same.
Have to admit I was confused by the title - I was looking for a discussion of the 4-bit floating point representation commonly used in ML applications these days, and referred to as FP4 (as opposed to FP8, FP16, or FP32, talking about the bit representation length), and it seems that this video only discusses FP8. Then I realized that it might be the course or module number for this video. Whoops!
Great video! Just found your channel today! Will there be more "Current Event" Videos soon?
That’s the plan! Are there specific topics you’d like to see covered?
shoutout to u sir
Saviour!
I have been struggling with full adder for almost a year cause i was new to logical circuits and your explanation is amazing thank you.
Is there any difference in changing POM to SOM with duality and demorgan's law? Suppose i have POM of (a,b) = M0.M1. Is the SOM m0+m1 (using demorgans) or m2+m3 (using duality)?
amazing explanation
W rizz bro you're saving my life rn
great video, thank you
Amazing explanation. Thank you!