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TUTE FOX
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Приєднався 17 бер 2020
Відео
Lecture 49 - Minimization of POS using K map ( മലയാളത്തിൽ ) - Digital Electronics
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Reduction rules for POS using K-map • Prepare the truth table for the function • Draw an empty K-map (2-variables, 3-variables, so on) • Fill the cells with value 0 for which the output is 0 • Fill rest of the cells with value 1 • Mark the Octets, Quads and Pairs by encircling the value 0s(also check map rolling, overlapping groups and remove redundant groups) • AND (.) the reduced expression t...
Lecture 48 - Minimization of 4 variable SOP using K map ( മലയാളത്തിൽ ) - Digital Electronics
Переглядів 8 тис.3 роки тому
Reduction rules for SOP using K-map • Prepare the truth table for the function • Draw an empty K-map • Fill the cells with value 1 for which the output is 1 • Fill rest of the cells with value 0 • Mark the Octets, Quads and Pairs by encircling the value 1s (also check map rolling, overlapping groups and remove redundant groups) • Write the final reduced expression and OR ( ) them to get the answer
Lecture 47 - Minimization of 3 variable SOP using K map ( മലയാളത്തിൽ ) - Digital Electronics
Переглядів 1,3 тис.3 роки тому
Reduction rules for SOP using K-map • Prepare the truth table for the function • Draw an empty K-map • Fill the cells with value 1 for which the output is 1 • Fill rest of the cells with value 0 • Mark the Octets, Quads and Pairs by encircling the value 1s (also check map rolling, overlapping groups and remove redundant groups) • Write the final reduced expression and OR ( ) them to get the answer
Lecture 46 - Expression of Boolean function as POS ( മലയാളത്തിൽ ) - Digital Electronics
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Sum of Products (SOP) and Product of Sums (POS) A Boolean expression consisting entirely either of minterm or maxterm is called canonical expression. There are two forms of canonical expression. 1. Sum of Products (SOP) 2. Product of Sums (POS) Sum of Products (SOP) A boolean expression consisting purely of Minterms (product terms) is said to be in canonical sum of products form. Product of Sum...
Lecture 45 - Expression of Boolean function as SOP ( മലയാളത്തിൽ ) - Digital Electronics
Переглядів 1,1 тис.3 роки тому
Sum of Products (SOP) and Product of Sums (POS) A Boolean expression consisting entirely either of minterm or maxterm is called canonical expression. There are two forms of canonical expression. 3. Sum of Products (SOP) 4. Product of Sums (POS) Sum of Products (SOP) A boolean expression consisting purely of Minterms (product terms) is said to be in canonical sum of products form. Product of Sum...
Lecture 44 - Sum of Products (SOP) and Product of Sums (POS) മലയാളത്തിൽ - Digital Electronics
Переглядів 4,8 тис.3 роки тому
Sum of Products (SOP) and Product of Sums (POS) A Boolean expression consisting entirely either of minterm or maxterm is called canonical expression. There are two forms of canonical expression. 5. Sum of Products (SOP) 6. Product of Sums (POS) Sum of Products (SOP) A boolean expression consisting purely of Minterms (product terms) is said to be in canonical sum of products form. Product of Sum...
Lecture 43 - MINTERM and MAXTERM ( മലയാളത്തിൽ ) - Digital Electronics
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MINTERM and MAXTERM Literal : A boolean variable and its complement are called literals. Example : Boolean variable A and its complement ~A are literals. Minterm : Minterm is a product of all the literals (with or without complement). Example : if we have two boolean variables X and Y then X.(~Y) is a minterm, we can express complement ~Y as Y’. So, the above minterm can be expressed as XY’ So,...
Lecture 42 - Laws of Boolean Algebra ( മലയാളത്തിൽ ) - Digital Electronics
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Laws of Boolean Algebra Boolean Algebra is Mathematics, that is used to analyze digital gates and circuits. We can use “Laws of Boolean” to reduce and simplify a complex Boolean expression to reduce the number of logic gates. The following set of rules are some of the common laws of Boolean Algebra (where ‘ or ~ is the NOT operator)
Lecture 41 - T Flip Flop Characteristic and Excitation table ( മലയാളത്തിൽ ) - Digital Electronics
Переглядів 4353 роки тому
T Flip Flop Characteristic and Excitation table The "T Flip Flop" is designed by passing the AND gate's output as input to the NOR gate of the "SR Flip Flop". The inputs of the "AND" gates, the present output state Q, and its complement Q' are sent back to each AND gate. The toggle input is passed to the AND gates as input. These gates are connected to the Clock (CLK) signal. In the "T Flip Flo...
Lecture 40 - T Flip Flop ( മലയാളത്തിൽ ) - Digital Electronics
Переглядів 4273 роки тому
T Flip Flop In T flip flop, "T" defines the term "Toggle". In SR Flip Flop, we provide only a single input called "Toggle" or "Trigger" input to avoid an intermediate state occurrence. Now, this flip-flop work as a Toggle switch. The next output state is changed with the complement of the present state output. This process is known as "Toggling"'. We can construct the "T Flip Flop" by making ch...
Lecture 39 - Master Slave JK Flip Flop ( മലയാളത്തിൽ ) - Digital Electronics
Переглядів 2,6 тис.3 роки тому
Master Slave JK Flip Flop The Master-Slave Flip-Flop is basically two gated SR flip-flops connected together in a series configuration with the slave having an inverted clock pulse. The outputs from Q and Q from the “Slave” flip-flop are fed back to the inputs of the “Master” with the outputs of the “Master” flip flop being connected to the two inputs of the “Slave” flip flop. This feedback con...
Lecture 38 - Race Around Condition of JK Flip Flop ( മലയാളത്തിൽ ) - Digital Electronics
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Race Around Condition of JK Flip Flop Race Around Condition In JK Flip-flop - For J-K flip-flop, if J=K=1, and if clk=1 for a long period of time, then Q output will toggle as long as CLK is high, which makes the output of the flip-flop unstable or uncertain. This problem is called race around condition in J-K flip-flop. This problem (Race Around Condition) can be avoided by ensuring that the c...
Lecture 37 - JK Flip Flop Characteristic and Excitation table ( മലയാളത്തിൽ ) - Digital Electronics
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JK Flip Flop Characteristic and Excitation table The JK Flip Flop is a gated SR flip-flop having the addition of a clock input circuitry. The invalid or illegal output condition occurs when both of the inputs are set to 1 and are prevented by the addition of a clock input circuit. So, the JK flip-flop has four possible input combinations, i.e., 1, 0, "no change" and "toggle". The symbol of JK f...
Lecture 36 - JK Flip Flop ( മലയാളത്തിൽ ) - Digital Electronics
Переглядів 6373 роки тому
JK flip-flop JK flip-flop is the modified version of SR flip-flop. It operates with only positive clock transitions or negative clock transitions. This circuit has two inputs J & K and two outputs Q & Q’. The operation of JK flip-flop is similar to SR flip-flop. Here, we considered the inputs of SR flip-flop as S = J . Q’ and R = K . Q in order to utilize the modified SR flip-flop for 4 combina...
Lecture 35 - D Flip Flop Characteristic and Excitation table ( മലയാളത്തിൽ ) - Digital Electronics
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Lecture 35 - D Flip Flop Characteristic and Excitation table ( മലയാളത്തിൽ ) - Digital Electronics
Lecture 34 - D Flip Flop ( മലയാളത്തിൽ ) - Digital Electronics
Переглядів 6253 роки тому
Lecture 34 - D Flip Flop ( മലയാളത്തിൽ ) - Digital Electronics
Lecture 33 - SR Flip Flop Characteristic and Excitation table ( മലയാളത്തിൽ ) - Digital Electronics
Переглядів 1,1 тис.3 роки тому
Lecture 33 - SR Flip Flop Characteristic and Excitation table ( മലയാളത്തിൽ ) - Digital Electronics
Lecture 32 - SR Flip Flop ( മലയാളത്തിൽ ) - Digital Electronics
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Lecture 32 - SR Flip Flop ( മലയാളത്തിൽ ) - Digital Electronics
Lecture 31 - SR (Set-Reset) Latch using NAND gates ( മലയാളത്തിൽ ) - Digital Electronics
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Lecture 31 - SR (Set-Reset) Latch using NAND gates ( മലയാളത്തിൽ ) - Digital Electronics
Lecture 30 - SR (Set-Reset) Latch using NOR gates ( മലയാളത്തിൽ ) - Digital Electronics
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Lecture 30 - SR (Set-Reset) Latch using NOR gates ( മലയാളത്തിൽ ) - Digital Electronics
Lecture 29 - DIGITAL LOGIC GATES (AND, OR, NOT, NAND, NOR, XOR, XNOR) - Truth Table മലയാളത്തിൽ
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Lecture 29 - DIGITAL LOGIC GATES (AND, OR, NOT, NAND, NOR, XOR, XNOR) - Truth Table മലയാളത്തിൽ
Lecture 28 - 2’S COMPLEMENT SUBTRACTION (മലയാളത്തിൽ)- Digital Electronics
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Lecture 28 - 2’S COMPLEMENT SUBTRACTION (മലയാളത്തിൽ)- Digital Electronics
Lecture 27 - 1’S COMPLEMENT SUBTRACTION (മലയാളത്തിൽ)- Digital Electronics
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Lecture 27 - 1’S COMPLEMENT SUBTRACTION (മലയാളത്തിൽ)- Digital Electronics
Lecture 26 - 1’S COMPLEMENT ADDITION (both numbers are negative) മലയാളത്തിൽ - Digital Electronics
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Lecture 26 - 1’S COMPLEMENT ADDITION (both numbers are negative) മലയാളത്തിൽ - Digital Electronics
Lecture 25 - 1’S COMPLEMENT ADDITION (-ve number has a greater magnitude) മലയാളത്തിൽ
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Lecture 25 - 1’S COMPLEMENT ADDITION (-ve number has a greater magnitude) മലയാളത്തിൽ
Lecture 24 - 1’S COMPLEMENT ADDITION (+ve number has a greater magnitude) മലയാളത്തിൽ
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Lecture 24 - 1’S COMPLEMENT ADDITION ( ve number has a greater magnitude) മലയാളത്തിൽ
Lecture 23 - Binary Multiplication (Fractional numbers) മലയാളത്തിൽ - Digital Electronics
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Lecture 23 - Binary Multiplication (Fractional numbers) മലയാളത്തിൽ - Digital Electronics
Lecture 22 - Binary Multiplication (മലയാളത്തിൽ) - Digital Electronics
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Lecture 22 - Binary Multiplication (മലയാളത്തിൽ) - Digital Electronics
Lecture 21 - Binary Subtraction (Fractional numbers) മലയാളത്തിൽ - Digital Electronics
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Lecture 21 - Binary Subtraction (Fractional numbers) മലയാളത്തിൽ - Digital Electronics
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