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Varsharani Mokal
India
Приєднався 20 чер 2022
Hi this is Prof. Varsharani Mokal. This channel provides you all about teaching and learning kind of content. Here students will learn various engineering subjects. Also here I will provide engineering study material like, notes, ppts, question papers and question paper analysis.
Write the SOP and POS form or standard form/expression for a given truth table.
Write the SOP and POS form or standard form/expression for a given truth table.Also, write it in terms of maxterm and minterm form.
#combinationalcircuit
#digitalcircuit
#sopandpos
#sope
#minterms
#maxterms
#combinationalcircuit
#digitalcircuit
#sopandpos
#sope
#minterms
#maxterms
Переглядів: 120
Відео
Representation of Logical expression using min-terms and max-terms |UNIT 2Combinational logic design
Переглядів 42Рік тому
Representation of Logical expression using min-terms and max-terms | UNIT 2:Combinational logic design | #combinationalcircuit #minterms #maxterms #logicalexpression
How to write minterms and maxterms from a given truth table|Relationship between Minterm and Maxterm
Переглядів 89Рік тому
How to write minterms and maxterms from a given truth table|Relationship between Minterm and Maxterm #digitalcircuit #SOPandPOS #Minterms #maxterms #combinationalcircuit
Concept of Minterms and Maxterms | UNIT 2: Combinational Logic Design | Lect 5
Переглядів 35Рік тому
Concept of Minterms and Maxterms | UNIT 2: Combinational Logic Design | Lect 5 #digitalcircuit #SOPandPOS #Minterms #maxterms #combinationalcircuit
Converting POS to SPOS | UNIT 2:Combinational Logic design | Lect 4
Переглядів 42Рік тому
Converting POS to SPOS | UNIT 2:Combinational Logic design | Lect 4 #digitalcircuit #SOPandPOS #Minterms #maxterms #combinationalcircuit
Converting SOP to SSOP | UNIT 2:Combinational Logic Design | LECT 3
Переглядів 30Рік тому
Converting SOP to SSOP | UNIT 2:Combinational Logic Design | LECT 3 #digitalcircuit #SOPandPOS #Minterms #maxterms #combinationalcircuit
UNIT 2:Combinational Logic design: Lect 2: SOP(Sum of Product )POS(Product of sum)& Canonical Form
Переглядів 53Рік тому
SOP(Sum of Product )POS(Product of sum)& Canonical Form Difference between SOP,POS,SSOP,SPOS with examples #digitalcircuit #SOPandPOS #Minterms #maxterms #combinationalcircuit
Digital Circuit Unit 2: Combinational Logic Design: Lect. 1 : Combinational Vs Sequential Circuits
Переглядів 149Рік тому
Combinational Vs Sequential Circuits #digitalcircuit #combinationalcircuit #sequentialcircuits #combinationalcircuitdesign
Syllabus of SPPU SE E&TC Digital Circuit 2019 - Pattern
Переглядів 541Рік тому
Syllabus of SPPU SE E&TC Digital Circuit 2019 - Pattern
Binary to Gray converter Practical | How to draw a circuit of binary to Gray Converter using 74138
Переглядів 2,3 тис.2 роки тому
Binary to Gray code Converter| Binary to Gray code converter Practical| How to draw a circuit diagram of binary to Gray code Converter using 74138
How to draw a circuit diagram of a full adder using IC 74138 with pin numbers
Переглядів 1,6 тис.2 роки тому
How to Draw a Circuit Diagram of a Full Adder using IC 74138
MOD-6/9 Counter Practical | Design and Implement MOD-6 and MOD- 9 Counter Using IC 7490
Переглядів 4 тис.2 роки тому
MOD-6/9 Counter Practical | Design and Implement MOD-6 and MOD- 9 Counter Using IC 7490
MOD 10 Counter Practical | Design and Implement MOD-10 Counter Using IC 7490
Переглядів 11 тис.2 роки тому
MOD 10 Counter Practical | Design and Implement MOD-10 Counter Using IC 7490
Full Adder Practical | Full Adder Using IC 74LS138| Digital IC trainer kit
Переглядів 2,7 тис.2 роки тому
Full Adder Practical | Full Adder Using IC 74LS138| Digital IC trainer kit
Full Subtractor Practical | Full subtractor using IC 74LS138.
Переглядів 7 тис.2 роки тому
Full Subtractor Practical | Full subtractor using IC 74LS138.
8-Bit Comparator Practical| 8-Bit Comparator using IC 7485
Переглядів 6 тис.2 роки тому
8-Bit Comparator Practical| 8-Bit Comparator using IC 7485
4-Bit Comparator Practical | 4-Bit Comparator using IC 7485 | Digital IC trainer kit
Переглядів 5 тис.2 роки тому
4-Bit Comparator Practical | 4-Bit Comparator using IC 7485 | Digital IC trainer kit
VLSI Practical |4-bit Universal shift register VHDL CODE | HOW TO WRITE VHDL CODE IN XILINX ISE 14.7
Переглядів 1,6 тис.2 роки тому
VLSI Practical |4-bit Universal shift register VHDL CODE | HOW TO WRITE VHDL CODE IN XILINX ISE 14.7
Mod 8 Up Counter VHDL CODE HOW TO WRITE VHDL CODE IN XILINX ISE 14.7 WITH PROCESS
Переглядів 8812 роки тому
Mod 8 Up Counter VHDL CODE HOW TO WRITE VHDL CODE IN XILINX ISE 14.7 WITH PROCESS
4-bit ALU VHDL CODE and How to write and simulate VHDL CODE IN XILINX ISE 14.7 WITH PROCESS
Переглядів 1,8 тис.2 роки тому
4-bit ALU VHDL CODE and How to write and simulate VHDL CODE IN XILINX ISE 14.7 WITH PROCESS
C programming: Address of Operator in c
Переглядів 132 роки тому
C programming: Address of Operator in c
Unary minus operator , unary plus operator and Not (!)operator in C
Переглядів 4852 роки тому
Unary minus operator , unary plus operator and Not (!)operator in C
What is Operator and operand in C? what is increment, decrement, and sizeof () operator in c?
Переглядів 632 роки тому
What is Operator and operand in C? what is increment, decrement, and sizeof () operator in c?
SE(E&TC) (2019 pattern)(SPPU)Subject: Data Structure Syllabus and Examination Scheme
Переглядів 5732 роки тому
SE(E&TC) (2019 pattern)(SPPU)Subject: Data Structure Syllabus and Examination Scheme
Nice explanation mam ❤
Great explanation!!!
Thank u so much......Best ever Explanation video on Digital Trainer kit
Thank you Mam .
Thank you Mam ❤
Wow❤
Hii mam, can you plz tell me(or make an video )about practical exams
mam value is same sign change
Very clear explanation 😇
in my university exam if they ask "Use the appropriate circuits of formal logic to design a size comparator of 8-bits numbers." your video is the solution?
Depends. If you had to create it using this particular IC or U can assume this IC
Best video 👍
Thanks mam
Thanks mam
Thankyou so much ma'am
In our digital ic trainer kit have only 8 input section then what to do
In our ic trainer kit we have 12 inputs but we require 16 so for the remaining 4 inputs, we have connected them to gnd. So we made them a fixed input n that is zero zero. So u can do like wise. You can connect remaining 8 inputs to either gnd or VCC.
What is meaning of cascading input?
In electronics cascading means connecting two stages back to back that o/p of 1st stage connected to the i/p of the second stage. If we talk Particularly about 4 bit comparator ic 7485 ,it compares only 4 bit but in our 8 bit comparator practical we need to compare 8 bit so we need two ICS and we have to do cascading so that if the first stage “overflows” that data cascades into the next stage. In short we do cascading to have more than 4 bits to compare.
Plz post unit 1
Promo SM 😻
Thanks ma'am
Mam also make video on jk flip flop vhdl code
Sure
Beautifully explained.
Thanks . Good Suport
Simple language better understanding ..Thank you mam
Nice video helpful 👍
Thanks for the detailed explanation 🙏😊
thank you very much ma for this clear explanation i just needed it because there is my practical tommorrow. only problem is for some part of video there was a finger on camera.
Keep uploading. Get to the top quicker = "Promo SM" !!!
You couldve at leat provided the code in the description
Thanku ❤️
🙏 𝓟Ř𝔬𝓂𝔬𝐒ϻ
Please cp the code here
-- Design Name: -- Module Name: aluhnd - Behavioral -- Project Name: -- Target Devices: -- Tool versions: -- Description: -- -- Dependencies: -- -- Revision: -- Revision 0.01 - File Created -- Additional Comments: -- ---------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following library declaration if using -- arithmetic functions with Signed or Unsigned values --use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if instantiating -- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all; entity aluhnd is Port ( a : in STD_LOGIC_VECTOR (3 downto 0); b : in STD_LOGIC_VECTOR (3 downto 0); opc : in STD_LOGIC_VECTOR (3 downto 0); y : out STD_LOGIC_VECTOR (3 downto 0)); end aluhnd; architecture Behavioral of aluhnd is begin process(opc,a,b) begin --if(rising_edge(Clk)) then -- process(a,b,opc) --begin case opc is when "0000"=>y<=a; when "0001"=>y<=not a; when "0010"=>y<=b; when "0011"=>y<=not b; when "0100"=>y<=a and b; when "0101"=>y<=a or b; when "0110"=>y<=a nand b; when "0111"=>y<=a nor b; when "1000"=>y<=a xor b; when "1001"=>y<=(a+b); when "1010"=>y<=(a-b); when "1011"=>y<=(a+1); when "1100"=>y<=(a-1); when "1101"=>y<=(b+1); when "1110"=>y<=(b-1); when "1111"=>y<=a xnor b; when others=>y<="0000"; end case; --end if; end process; end Behavioral;
Very helpful thank you
Glad it was helpful!
Mam only syllabus topics questions are come in exam
bro do u know any other channel to learn Data Structure accordingly SPPU SE ENTC
Please give us to Book Pdf On Telegram
thanks for information